Hardware Architecture Modeling Engineer, Accelerators
corporate_fare Google place Sunnyvale, CA, USA
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Minimum Qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 3 years of experience in computer architecture performance analysis and optimization, or a PhD degree in lieu of industry experience.
- Experience in developing software systems in C++.
Preferred Qualifications:
- Experience in applying computer architecture principles to solve open-ended problems.
- Experience in analyzing workload performance and creating benchmarks.
- Experience in hardware and software co-design.
- Knowledge of processor design or accelerator designs and mapping ML models to hardware architectures.
- Knowledge of design of digital logic at the Register Transfer Level (RTL) using Verilog.
About the Job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As the Hardware Architecture Modeling Engineer, you will work with hardware and software architects to model, analyze, and define next-generation TPUs.
Responsibilities
- Work on ML workload characterization and benchmarking.
- Conduct performance and power analyses and quantitatively evaluate proposals.
- Develop architectural and microarchitectural models to enable quantitative analysis.
- Collaborate with partners in hardware design, software, compiler, Machine Learning (ML) model and research teams for effective hardware/software co-design.
- Propose capabilities and optimizations for next-generation TPUs and chip roadmap.
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law.
Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
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