zeroRISC is seeking highly-motivated Design Engineers to develop highly secure, open-source silicon. Built with OpenTitan, the first-ever commercial open-source secure silicon design, our products emphasize transparency and security to provide foundational trustworthiness to our customers.
You will be a significant contributor to OpenTitan’s IP design at the top and block-level, learning from an experienced group of contributors in a highly collaborative community. While prior security experience is not required, you will be working closely on a high quality security design, verifying correctness and developing methodologies to scale integrations while preserving security guarantees.
Responsibilities- Design, implement, and document ASICs focusing on system security and operational stability, from architectural definition through silicon validation.
- Microarchitectural specification and implementation.
- Collaborate with design verification and software teams in a cross-functional manner to rigorously verify digital designs.
- Balance functionality, performance, power, area, and project constraints to meet overall goals.
- Adhere to best practices, engineering standards and comprehensive documentation.
Requirements- Bachelor's or higher in Electrical Engineering, Computer Science, or related field.
- Proficient in SystemVerilog-based chip and IP block design.
- Skilled in design flows such as lint, synthesis, and timing closure.
- Knowledgeable in multi-power and multi-clock domain designs helpful.
- Background in ASIC security technologies is not necessary, but helpful.
- Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
- Ability to work well in a team and be productive under aggressive schedules.
Education and Experience- PhD, Master’s degree or Bachelor's degree in a technical subject area.
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